Posts
-
BoxLambda OS Software Architecture, First Draft.
-
Minimizing Interrupt Latency and Jitter.
-
BoxLambda Simplified.
-
The Latency Shakeup.
-
Dynamically Loading a CPU in BoxLambda.
-
Keeping Time: RTCC and I2C.
-
Hardware and Timer Interrupts.
-
SPI Flash Access, Boot, and Core.
-
On USB HID, Keyboard LEDs, and device emulation.
-
The Interconnect, Harvard Architecture, and Dual Port RAM.
-
An attempt at a PicoRV32-based Soft DMA Controller - Optimizations.
-
An attempt at a PicoRV32-based Soft DMA Controller.
-
Chiptunes! A Dual YM2149 PSG Audio core for BoxLambda.
-
Post-Implementation Memory Updates.
-
Bringing up the SD-Card Controller and File System.
-
Integrating VERA.
-
Understanding VERA.
-
Building Software and Gateware with CMake and Bender.
-
Exit MIG, Enter LiteDRAM.
-
A C Standard Library for BoxLambda.
-
OpenOCD: Tying Up Loose Ends.
-
Hello Debugger!
-
Testing with Verilator.
-
Warnings and Verilator Lint.
-
Make, Tcl, and Bender Build System.
-
First Contact: Hello World!
-
Git Workflow and Setup.
-
Interrupts, and estimated FPGA Resource Utilization.
-
BoxLambda Architecture, First Draft.
-
Key Components Part 3: DMA and Peripherals.
-
Key Components Part 2: Graphics and Sound Cores.
-
Key Components Part 1: Bus, Microprocessor and Memory Controller.
-
Requirements Analysis.
-
Introducing the BoxLambda Project.