Posts
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Minimizing Interrupt Latency and Jitter.
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BoxLambda Simplified.
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The Latency Shakeup.
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Dynamically Loading a CPU in BoxLambda.
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Keeping Time: RTCC and I2C.
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Hardware and Timer Interrupts.
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SPI Flash Access, Boot, and Core.
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On USB HID, Keyboard LEDs, and device emulation.
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The Interconnect, Harvard Architecture, and Dual Port RAM.
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An attempt at a PicoRV32-based Soft DMA Controller - Optimizations.
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An attempt at a PicoRV32-based Soft DMA Controller.
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Chiptunes! A Dual YM2149 PSG Audio core for BoxLambda.
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Post-Implementation Memory Updates.
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Bringing up the SD-Card Controller and File System.
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Integrating VERA.
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Understanding VERA.
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Building Software and Gateware with CMake and Bender.
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Exit MIG, Enter LiteDRAM.
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A C Standard Library for BoxLambda.
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OpenOCD: Tying Up Loose Ends.
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Hello Debugger!
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Testing with Verilator.
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Warnings and Verilator Lint.
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Make, Tcl, and Bender Build System.
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First Contact: Hello World!
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Git Workflow and Setup.
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Interrupts, and estimated FPGA Resource Utilization.
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BoxLambda Architecture, First Draft.
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Key Components Part 3: DMA and Peripherals.
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Key Components Part 2: Graphics and Sound Cores.
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Key Components Part 1: Bus, Microprocessor and Memory Controller.
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Requirements Analysis.
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Introducing the BoxLambda Project.